Resource widening versus replication: limits and performance-cost trade-off

Principles of CMOS VLSI design: a systems perspective

Principles of CMOS VLSI design: a systems perspective

Software pipelining: an effective scheduling technique for VLIW machines

PLDI '88 Proceedings of the ACM SIGPLAN 1988 conference on Programming Language design and Implementation

High-bandwidth data memory systems for superscalar processors

ASPLOS IV Proceedings of the fourth international conference on Architectural support for programming languages and operating systems

Code optimizers and register organizations for vector architectures

Code optimizers and register organizations for vector architectures

Compiling for the Cydra 5

The Journal of Supercomputing - Special issue on instruction-level parallelism

Iterative modulo scheduling: an algorithm for software pipelining loops

MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture

Hypernode reduction modulo scheduling

Proceedings of the 28th annual international symposium on Microarchitecture

The case for a single-chip multiprocessor

Proceedings of the seventh international conference on Architectural support for programming languages and operating systems

Software pipelining: a comparison and improvement

MICRO 23 Proceedings of the 23rd annual workshop and symposium on Microprogramming and microarchitecture

Increasing memory bandwidth with wide buses: compiler, hardware and performance trade-offs

ICS '97 Proceedings of the 11th international conference on Supercomputing

Superscalar Instruction Execution in the 21164 Alpha Microprocessor

IEEE Micro

Microarchitecture of HaL's memory management unit

COMPCON '95 Proceedings of the 40th IEEE Computer Society International Conference

Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing

MICRO 14 Proceedings of the 14th annual workshop on Microprogramming