Low-power operation using self-timed circuits and adaptive scaling of the supply voltage
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Manufacturability of low power CMOS technology solutions
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
ISLPED '96 Proceedings of the 1996 international symposium on Low power electronics and design
Exploring the design space of mixed swing QuadRail for low-power digital circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Digital Computer Arithmetic
A completey on-chip voltage regulation technique for low power digital circuits
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
An adaptive on-chip voltage regulation technique for low-power applications
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
Hi-index | 0.00 |
One of the major problems faced by the designer when operating CMOS static logic circuits at low power supply voltages (normalized to VT is that the delay spread introduced by today's IC manufacturing variations can increase dramatically. In this paper we describe an approach for decreasing the delay spread and power spread in ICs based on adaptively servoing the circuits between static CMOS operation and QuadRail operation. An on-chip series-regulator employing a dummy delay path is used to generate the adaptive low swing power supply rails making this approach fully compatible with a standard CMOS IC design methodology. Simulation results are presented demonstrating that for a 16*16+36-bit multiplier-accumulator designed in 0.5µm CMOS process the proposed approach decreases the delay spread from 3.9X to 2.3X and the power spread from 3.6X to 1.8X.