A structural view of the Cedar programming environment
ACM Transactions on Programming Languages and Systems (TOPLAS)
Fast, small, and static combinatorial CMOS circuits
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Patchwork: layout from schematic annotations
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
A model of design representation and synthesis
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A version server for computer-aided design data
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A retrospective on the Dorado, a high-performance personal computer
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
Switch-Level Model and Simulator for MOS Digital Systems
Switch-Level Model and Simulator for MOS Digital Systems
An object-oriented VHDL design environment
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Patchwork: layout from schematic annotations
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
MOSAIC: a tile-based datapath layout generator
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
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This paper presents a data structure for representing the structure of VLSI circuits and basic operations for manipulating this data structure. Its features include conceptual integrity, rich expressive power, and high extensibility. It forms the nucleus of a design analysis and synthesis system which has been used to design several major chips.