Built-in test for VLSI: pseudorandom techniques
Built-in test for VLSI: pseudorandom techniques
Design & analysis of fault tolerant digital systems
Design & analysis of fault tolerant digital systems
Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Analysis and Design of Linear Finite State Machines for Signature Analysis Testing
IEEE Transactions on Computers
Shift Register Sequences
Challenges in memory-logic integration
MTDT '95 Proceedings of the 1995 IEEE International Workshop on Memory Technology, Design and Testing
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A new BIST scheme for on-chip testing of non-volatile memories and based onsignature analysis is presented. The signature of the whole memory, whose content can bechanged selectively by the user, is dynamically self-learned by thememory and it is saved in a dedicated memory location.Either such a signature can be externally compared with the expected one inorder to check for the programming operation, or it can be used forcomparison purposes when data retention must be self-tested.