A Fast Modified CORDIC—Implementation of Radial Basis Neural Networks

  • Authors:
  • U. Meyer-Bäse;A. Meyer-Bäse;J. Mellott;F. Taylor

  • Affiliations:
  • Department of Electrical Engineering, University of Florida, Gainesville, FL 32611;Department of Electrical Engineering, University of Florida, Gainesville, FL 32611;Department of Electrical Engineering, University of Florida, Gainesville, FL 32611;Department of Electrical Engineering, University of Florida, Gainesville, FL 32611

  • Venue:
  • Journal of VLSI Signal Processing Systems
  • Year:
  • 1998

Quantified Score

Hi-index 0.00

Visualization

Abstract

This paper describes how the real-time bandwidth of a radialbasis neural network (RBNN) can be improved by the use of afield programmable gate array (FPGA). Accelerated performanceis gained by moving the time-consuming RBNN exponentialcalculations from a general purpose processor to a dedicatedFPGA that implements an optimized CORDIC-algorithm. Thedesign methodology is presented and illustrated with a speechrecognition application.