Substrate modeling and lumped substrate resistance extraction for CMOS ESD/latchup circuit simulation

Authors:
Tong Li;Ching-Han Tsai;Elyse Rosenbaum;Sung-Mo Kang
Affiliations:
Silicon Perspective Corp., Santa Clara, CA;Coordinated Science Laboratory, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL;Coordinated Science Laboratory, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL;Coordinated Science Laboratory, Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL
Venue:
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Year:
1999

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Abstract