A routing procedure for mixed array of custom macros and standard cells

  • Authors:
  • Hidekazu Terai;Michiyoshi Hayase;Tokinori Kozawa

  • Affiliations:
  • Central Research Laboratory, Hitachi, Ltd., 1-280 Higashi-koigakubo, Kokubunji, Tokyo, 185, Japan;Central Research Laboratory, Hitachi, Ltd., 1-280 Higashi-koigakubo, Kokubunji, Tokyo, 185, Japan;Central Research Laboratory, Hitachi, Ltd., 1-280 Higashi-koigakubo, Kokubunji, Tokyo, 185, Japan

  • Venue:
  • DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
  • Year:
  • 1985

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Abstract

Routing algorithms for multi- (more than 3) sided pin arrangements are presented. These algorithms are essential for layouts mixing standard cells with custom macros such as ROM, RAM, PLA and ALU. An extended layout model in which these algorithms are applied is also presented. An experimental result regarding the effect on block area with respect to cell height, obtained by comparing an extended model with a traditional model, is described.