Speed up techniques of logic simulation
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Principles of design automatioon system for very large scale computer design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Establishment of higher level logic design for very large scale computer
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Logic verification system for very large computers using LSI's
DAC '79 Proceedings of the 16th Design Automation Conference
Basic concepts of timing-oriented design automation for high-performance mainframe computers
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Algorithm for vectorizing logic simulation and evaluation of “VELVET” performance
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Principles of design automatioon system for very large scale computer design
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
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The paper describes one of the methods to evaluate the design verification progress of logic simulation. In the development of the very large scale general purpose computer HITACHI M-680H/682H, the function test programs designed for the products have been directly used to verify the design in simulation. Test programs establish the definite goal and enable to extensively verify the design. The simulation techniques, which carry out at high speed the very large design described in different levels of abstraction, have developed for this purpose. The method has detected 30% of design errors of M-68X and effectively reduced its development time.