Logic verification system for very large computers using LSI's

  • Authors:
  • Yasuhiro Ohno;Masayuki Miyoshi;Katsuya Sato

  • Affiliations:
  • -;-;-

  • Venue:
  • DAC '79 Proceedings of the 16th Design Automation Conference
  • Year:
  • 1979

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Abstract

To aid design verification of very large computers using many LSI's, software tools including a logic simulator with capability of 750,000 gates have been developed.