Techniques for the simulation of computer logic
Communications of the ACM
Optimizing bit-time computer simulation
Communications of the ACM
ACM '65 Proceedings of the 1965 20th national conference
The concurrent simulation of nearly identical digital networks
25 years of DAC Papers on Twenty-five years of electronic design automation
IEEE Transactions on Parallel and Distributed Systems
Fast functional simulation using branching programs
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Ravel: assigned-delay compiled-code logic simulation
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Using split event sets to form and schedule event combinations in discrete event simulation
ANSS '92 Proceedings of the 25th annual symposium on Simulation
Event manipulation for discrete simulations requiring large numbers of events
Communications of the ACM
A comparison of simulation event list algorithms
Communications of the ACM
Modular requirements for digital logic simulation at a predefined functional level
ACM '72 Proceedings of the ACM annual conference - Volume 1
On the Complexity of Boolean Functions Computed by Lazy Oracles
IEEE Transactions on Computers
Tutorial: Compiling concurrent languages for sequential processors
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Ultimate: A hardware logic simulation engine
DAC '84 Proceedings of the 21st Design Automation Conference
An MOS digital network model on a modified thevenin equivalent for logic simulation
DAC '84 Proceedings of the 21st Design Automation Conference
Event list management - a tutorial
WSC '83 Proceedings of the 15th conference on Winter Simulation - Volume 2
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Survey of analysis, simulation and modeling for large scale logic circuits
DAC '81 Proceedings of the 18th Design Automation Conference
A module level simulation technique for systems composed of LSI's and MSI's
DAC '78 Proceedings of the 15th Design Automation Conference
Simulation of input-output units
Proceedings of the workshop on virtual computer systems
The concurrent simulation of nearly identical digital networks
DAC '73 Proceedings of the 10th Design Automation Workshop
High-speed concurrent fault simulation with vectors and scalars
DAC '80 Proceedings of the 17th Design Automation Conference
Table lookup techniques for fast and flexible digital logic simulation
DAC '80 Proceedings of the 17th Design Automation Conference
DAC '80 Proceedings of the 17th Design Automation Conference
Non-integral event timing for digital logic simulation
DAC '76 Proceedings of the 13th Design Automation Conference
Fault-test analysis techniques based on logic simulation
DAC '72 Proceedings of the 9th Design Automation Workshop
Automation of test specifications for N/C printed circuit boards
DAC '70 Proceedings of the 7th Design Automation Workshop
An interactive logic activity modelling program
ACM '72 Proceedings of the ACM annual conference - Volume 2
A new algebraic procedure for the simulation of large digital networks
DAC '75 Proceedings of the 12th Design Automation Conference
Digital logic simulation models and evolving technology
DAC '75 Proceedings of the 12th Design Automation Conference
Test generation systems in Japan
DAC '75 Proceedings of the 12th Design Automation Conference
DAC '75 Proceedings of the 12th Design Automation Conference
Concurrent fault simulation and functional level modeling
DAC '77 Proceedings of the 14th Design Automation Conference
DAC '82 Proceedings of the 19th Design Automation Conference
Speed and accuracy in digital network simulation based on structural modeling
DAC '82 Proceedings of the 19th Design Automation Conference
An improved events list algorithm
WSC '77 Proceedings of the 9th conference on Winter simulation - Volume 2
MSI and LSI impact on digital systems testing
DAC '74 Proceedings of the 11th Design Automation Workshop
Logic verification system for very large computers using LSI's
DAC '79 Proceedings of the 16th Design Automation Conference
Some Recent Advances in Software and Hardware Logic Simulation
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Model-based fault diagnosis of sequential circuits and its acceleration
EURO-DAC '91 Proceedings of the conference on European design automation
Modular requirements for digital logic simulation at a predefined functional level
ACM SIGDA Newsletter
Functional Partitioning and Simulation of Digital Circuits
IEEE Transactions on Computers
A study on impact of aggressor de-rating in the context of multiple crosstalk effects in circuits
Proceedings of the 19th ACM Great Lakes symposium on VLSI
Research: Simulation of three MAC protocols for intelligent highway packet radio networks
Computer Communications
Simulation-based ATPG for low power testing of crosstalk delay faults in asynchronous circuits
International Journal of Computer Applications in Technology
| Hi-index | 48.26 |
A technique for simulating the detailed logic networks of large and active digital systems is described. Essential objectives sought are improved ease and economy in model generation, economy in execution time and space, and a facility for handling simultaneous activities. The main results obtained are a clear and useful separation of structural and behavioral model description, a reduction of manual tasks in converting Boolean logic into a structural model, the elimination of manual processes in achieving exclusive simulation of activity, an event-scheduling technique which does not deteriorate in economy as the event queue grows in length, and a simulation procedure which deals effectively with any mixture of serial and simultaneous activities. The passage of time is simulated in a precise, quantitative fashion, and systems to be simulated may be combinations of synchronous and asynchronous logic. Certain aspects of the techniques described may be used for the simulation of network structures other than digital networks.