Performance comparison of load/store and symmetric instruction set architectures

  • Authors:
  • D. Alpert;A. Averbuch;O. Danieli

  • Affiliations:
  • Intel Corporation SC 4-59, P.O. Box 58122, Santa Clara, CA and National Semiconductor Israel, P.O. Box 3007, Herzelia B. 46104, Israel;Dept. of Computer Science, School of Mathematical Sciences, Tel-Aviv University, Ramat Aviv, Tel Aviv 69978, Israel;National Semiconductor Israel, P.O. Box 3007, Herzelia B. 46104, Israel

  • Venue:
  • ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
  • Year:
  • 1990

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Abstract

Is it true that a Load/Store architecture is both simpler and faster than a Symmetric architecture, or does the Symmetric architecture offer a potential performance advantage that can be realized by the use of additional hardware?In order to answer it quantitatively, we simulated two models that were equal in all aspects except the factor that we measure. We found that the Load/Store model executes 12% more instructions but only 4% more cycles.