Fault Modeling and Simulation Using VHDL-AMS
Analog Integrated Circuits and Signal Processing - Special issue: Analog VHDL
Multilanguage design of heterogeneous systems
CODES '99 Proceedings of the seventh international workshop on Hardware/software codesign
DATE '99 Proceedings of the conference on Design, automation and test in Europe
On the Integration of Design and Test for Chips Embedding MEMS
IEEE Design & Test
THERMODEL: A Tool for Thermal Model Generation, and Application for MEMS
Analog Integrated Circuits and Signal Processing
Generation of Electrically Induced Stimuli for MEMS Self-Test
Journal of Electronic Testing: Theory and Applications
| Hi-index | 0.00 |
This paper illustrates an approach to design and validation of heterogeneous systems. The emphasis is placed on devices which incorporate MEMS parts in either a single mixed-technology (CMOS + micromachining) SOC device, or alternatively as a hybrid system with the MEMS part in a separate chip. The design flow is general, and it is illustrated for the case of applications embedding CMOS sensors. In particular, applications based on finger-print recognition are considered since a rich variety of sensors and data processing algorithms can be considered. A high level multi-language/multi-engine approach is used for system specification and co-simulation. This also allows for an initial high-level architecture exploration, according to performance and cost requirements imposed by the target application. Thermal simulation of the overall device, including packaging, is also considered since this can have a significant impact in sensor performance. From the selected system specification, the actual architecture is finally generated via a multi-language co-design approach which can result in both hardware and software parts. The hardware parts are composed of available IP cores. For the case of a single chip implementation, the most important issue of embedded-core-based testing is briefly considered, and current techniques are adapted for testing the embedded cores in the SOC devices discussed.