Models for power consumption and power grid noise due to datapath transition activity
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Efficient estimation of signal transition activity in MAC architectures
Proceedings of the 2002 international symposium on Low power electronics and design
Transition Activity Estimation for General Correlated Data Distributions
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
A Fast Word-Level Statistical Estimator of Intra-Bus Crosstalk
Proceedings of the conference on Design, automation and test in Europe - Volume 2
Moment-Based Power Estimation in Very Deep Submicron Technologies
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Word-length optimization for differentiable nonlinear systems
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ILP models for simultaneous energy and transient power minimization during behavioral synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Models for Architectural Power and Power Grid Noise Analysis on Data Bus
Journal of VLSI Signal Processing Systems
Switching activity models for power estimation in FPGA multipliers
ARC'07 Proceedings of the 3rd international conference on Reconfigurable computing: architectures, tools and applications
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This paper presents a novel analytical approach to compute the switching activity in digital circuits at the word level in the presence of glitching and correlation. The proposed approach makes use of signal statistics such as mean, variance, and autocorrelation. It is shown that the switching activity /spl alpha//sub f/ at the output node f of any arbitrary circuit in the presence of glitching and correlation is computed as /spl alpha//sub f/=/spl Sigma//sub i=1//sup S-1//spl alpha/(f/sub i,i+1/)=/spl Sigma//sub i=1//sup S-/ /sup 1/p(f/sub i+1/)(1-p(f/sub i/))(1-/spl rho/(f/sub i,i+1/)) (1) where /spl rho/(f/sub i,i+1/)=/spl rho/(f/sub i,i+1/)=(E[f/sub i/(Sn)f/sub i+1/(Sn)]- p(f/sub i/)p(f/sub i+1/))/(/spl radic/(p(f/sub i/)-p(f/sub i/)/sup 2/)(p(f/sub i+1/)- p(f/sub i+1//sup 2/))) (2). S number of time slots in a cycle; /spl rho/(f/sub i/,+1) time-slot autocorrelation coefficient; E[x]=expected value of x; p/sub x/=probability of the signal x being "one". The switching activity analysis of a signal at the word level is computed by summing the activities of all the individual bits constituting the signal. It is also shown that if the correlation coefficient of the higher order bits of a normally distributed signal x is /spl rho/(x/sub c/), then the bit P/sub 0/ where the correlation begins and the correlation coefficient is related hy /spl rho/(x/sub c/)=erfc{(2(P/sub 0/-1)-1)/(/spl radic/2/spl sigma//sub x/)} where erfc(x)=complementary error function; /spl sigma//sub x/=variance of x. The proposed approach can estimate the switching activity in less than a second which is orders of magnitude faster than simulation-based approaches. Simulation results show that the errors using the proposed approach are about 6.1% on an average and that the approach is well suited even for highly correlated speech and music signals.