A VHDL-based methodology for the design and verification of pipeline A/D converters

Authors:
Eduardo Peralías;Antonio J. Acosta;Adoración Rueda;José L. Huertas
Affiliations:
Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla, Edificio CICA, c/ Tarfia s/n, 41012-SEVILLA, Spain;Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla, Edificio CICA, c/ Tarfia s/n, 41012-SEVILLA, Spain;Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla, Edificio CICA, c/ Tarfia s/n, 41012-SEVILLA, Spain;Instituto de Microelectrónica de Sevilla (IMSE-CNM), Universidad de Sevilla, Edificio CICA, c/ Tarfia s/n, 41012-SEVILLA, Spain
Venue:
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Year:
2000

Analog and mixed-signal hardware description languages

Analog and mixed-signal hardware description languages
Analog VHDL

Analog VHDL
DfT and on-line test of high-performance data converters: a practical case

ITC '98 Proceedings of the 1998 IEEE International Test Conference

Analog/mixed-signal IP modeling for design reuse

Proceedings of the conference on Design, automation and test in Europe
An Application of Self-Timed Circuits to the Reduction of Switching Noise in Analog-Digital Circuits

PATMOS '00 Proceedings of the 10th International Workshop on Integrated Circuit Design, Power and Timing Modeling, Optimization and Simulation
Highly Digital, Low-Cost Design of Statistic Signal Acquisition in SoCs

Proceedings of the conference on Design, automation and test in Europe - Volume 3
A mixed-signal verification kit for verification of analogue-digital circuits

Proceedings of the conference on Design, automation and test in Europe: Designers' forum

Hi-index	0.00