DfT and on-line test of high-performance data converters: a practical case

  • Authors:
  • Eduardo J. Peralías;Adoración Rueda;Juan A. Prieto;José L. Huertas

  • Affiliations:
  • -;-;-;-

  • Venue:
  • ITC '98 Proceedings of the 1998 IEEE International Test Conference
  • Year:
  • 1998

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Abstract

This paper addresses the practical implementation of aDesign-for-Testability (DfT) technique applicable to digitally-corrected pipelined Analog-to-Digital Converters(ADC). The objective of this DfT is to improve both the on-andoff-line testability of these important mixed-signal ICs.Because of the self-correction capability, such a kind ofconverters has some inherent insensitivity to the effect offaults which represents a disadvantage for testing and diagnosis.We will show that potentially malfunctioning unitscan be concurrently identified with low extra circuitry. Inaddition, this structure-based DfT scheme can also be usefulto reduce the time in production-level testing. A CMOSswitched-capacitor 10-b ADC is used as demonstrator ofthe proposed technique.