Pseudo-random testing and signature analysis for mixed-signal circuits
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
A BIST scheme for on-chip ADC and DAC testing
DATE '00 Proceedings of the conference on Design, automation and test in Europe
New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters
Journal of Electronic Testing: Theory and Applications
BIST for D/A and A/D Converters
IEEE Design & Test
DfT and on-line test of high-performance data converters: a practical case
ITC '98 Proceedings of the 1998 IEEE International Test Conference
A design-for-test technique for multistage analog circuits
ATS '95 Proceedings of the 4th Asian Test Symposium
Built-in self-test methodology for A/D converters
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Design for Testability and Built-In Self-Test of Mixed-Signal Circuits: A Tutorial
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
A Simplified Polynomial-Fitting Algorithm for DAC and ADC BIST
ITC '97 Proceedings of the 1997 IEEE International Test Conference
An efficient linearity test for on-chip high speed ADC and DAC using loop-back
Proceedings of the 14th ACM Great Lakes symposium on VLSI
A simple built-in current sensor for IDDQ testing of CMOS data converters
Integration, the VLSI Journal
Delta-sigma modulator based mixed-signal BIST architecture for SoC
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Proceedings of the conference on Design, automation and test in Europe
A simple built-in current sensor for IDDQ testing of CMOS data converters
Integration, the VLSI Journal
Complex oscillation-based test and its application to analog filters
IEEE Transactions on Circuits and Systems Part I: Regular Papers - Special issue on ISCAS 2009
On chip testing data converters using static parameters
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Digital Test Method for Embedded Converters with Unknown-Phase Harmonics
Journal of Electronic Testing: Theory and Applications
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This paper proposes a test approach and circuitry suitable for built-in self-test (BIST) of digital-to-analog (D/A) and analog-to-digital (A/D) converters. Offset, gain, linearity and differential linearity errors are tested without using test equipment. The proposed BIST structure decreases the test cost and test time. The BIST circuitry has been designed to D/A and A/D converters using CMOS 1.2 &mgr;m technology. By only a minor modification the test structure would be able to localize the fail situation. The small value of area overhead (AOH), the simplicity and efficiency of the proposed BIST architecture seem to be promising for manufacturing.