A Novel DFT Technique for Testing Complete Sets of ADCs and DACs in Complex SiPs

  • Authors:
  • Vincent Kerzerho;Philippe Cauvet;Serge Bernard;Florence Azais;Mariane Comte;Michel Renovell

  • Affiliations:
  • Philips Semiconductors and LIRMM;Philips Semiconductors;LIRMM;LIRMM;LIRMM;LIRMM

  • Venue:
  • IEEE Design & Test
  • Year:
  • 2006

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Abstract

Editor's note: Testing mixed-signal circuits remains one of the most difficult challenges within the semiconductor industry. In this article, the authors present a novel DFT technique to test sets of ADCs and DACs embedded in a complex SiP. The technique provides fully digital testing on the converters to significantly reduce the cost of testing.