A digital partial built-in self-test structure for a high performance automatic gain control circuit
DATE '99 Proceedings of the conference on Design, automation and test in Europe
A BIST scheme for on-chip ADC and DAC testing
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Implementation of a linear histogram BIST for ADCs
Proceedings of the conference on Design, automation and test in Europe
A Low-Cost BIST Architecture for Linear Histogram Testing of ADCs
Journal of Electronic Testing: Theory and Applications
Optimizing Sinusoidal Histogram Test for Low Cost ADC BIST
Journal of Electronic Testing: Theory and Applications
New BIST Schemes for Structural Testing of Pipelined Analog to Digital Converters
Journal of Electronic Testing: Theory and Applications
Testing embedded-core based system chips
ITC '98 Proceedings of the 1998 IEEE International Test Conference
Towards an ADC BIST Scheme Using the Histogram Test Technique
ETW '00 Proceedings of the IEEE European Test Workshop
17.2 A Design for Testability Study on a High Performance Automatic Gain Control Circuit
VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium
A codesign tool to validate and improve an FPGA based test strategy for high resolution audio ADC
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
A Built-in-Self-Test Scheme for Segmented and Binary Weighted DACs
Journal of Electronic Testing: Theory and Applications
Delta-sigma modulator based mixed-signal BIST architecture for SoC
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
Fully digital strategy for fast calibration and test of ΣΔ ADC's
Microelectronics Journal
A Low-Cost Test Methodology for Dynamic Specification Testing of High-Speed Data Converters
Journal of Electronic Testing: Theory and Applications
A First Step for an INL Spectral-Based BIST: The Memory Optimization
Journal of Electronic Testing: Theory and Applications
A BIST Scheme for SNDR Testing of ΣΔ ADCs Using Sine-Wave Fitting
Journal of Electronic Testing: Theory and Applications
Investigation into the Use of Hybrid Solutions for ΣΔ A/D Converter Testing
Journal of Electronic Testing: Theory and Applications
Fully digital strategy for fast calibration and test of ΣΔ ADCs
Microelectronics Journal
Proceedings of the conference on Design, automation and test in Europe
Fast PWM-Based Test for High Resolution ΣΔ ADCs
Journal of Electronic Testing: Theory and Applications
PWM-based test stimuli generation for BIST of high resolution ΣΔ ADCs
Proceedings of the conference on Design, automation and test in Europe
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
A dynamic ADC test processor for built-in-self-test of ADCs
ICC'08 Proceedings of the 12th WSEAS international conference on Circuits
Low-cost digital detection of parametric faults in cascaded ΣΔ modulators
IEEE Transactions on Circuits and Systems Part I: Regular Papers
Spectral Prediction for Specification-Based Loopback Test of Embedded Mixed-Signal Circuits
Journal of Electronic Testing: Theory and Applications
A robust ADC code hit counting technique
Proceedings of the Conference on Design, Automation and Test in Europe
Wafer-level defect screening for "big-D/small-A" mixed-signal SoCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
ΔΣ modulation based on-chip ramp generator for ADC BIST
CONTROL'05 Proceedings of the 2005 WSEAS international conference on Dynamical systems and control
Digital Test Method for Embedded Converters with Unknown-Phase Harmonics
Journal of Electronic Testing: Theory and Applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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