A BIST scheme for on-chip ADC and DAC testing
DATE '00 Proceedings of the conference on Design, automation and test in Europe
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Frequency Domain Testing of ADCs
IEEE Design & Test
A Simplified Polynomial-Fitting Algorithm for DAC and ADC BIST
Proceedings of the IEEE International Test Conference
System-level Testing of RF Transmitter Specifications Using Optimized Periodic Bitstreams
VTS '04 Proceedings of the 22nd IEEE VLSI Test Symposium
Reconfiguration for Enhanced ALternate Test (REALTest) of Analog Circuits
ATS '04 Proceedings of the 13th Asian Test Symposium
Alternate Test Methodology for High Speed A/D Converter Testing on Low Cost Tester
ATS '05 Proceedings of the 14th Asian Test Symposium on Asian Test Symposium
CONTROLLED SINE WAVE FITTING FOR ADC TEST
ITC '04 Proceedings of the International Test Conference on International Test Conference
On chip testing data converters using static parameters
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A Built-in-Self-Test Σ-Δ ADC Prototype
Journal of Electronic Testing: Theory and Applications
Spectral Prediction for Specification-Based Loopback Test of Embedded Mixed-Signal Circuits
Journal of Electronic Testing: Theory and Applications
An Output Response Analyzer Circuit for ADC Built-in Self-Test
Journal of Electronic Testing: Theory and Applications
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Testing high-speed A/D converters for dynamic specifications needs test equipment running at high frequency. In this paper, a methodology to test high-speed A/D converters using low-frequency resources is described. It is based on the alternate testing approach. In the proposed methodology, models are built to map the signatures of an initial set of devices, obtained on the proposed low-cost test set-up, to the dynamic specifications of the same devices, obtained using high-precision test equipment. During production testing, the devices are tested on the low-cost test set-up. The dynamic specifications of the devices are estimated by capturing their signatures on the low cost test set-up and processing them with the pre-developed models. As opposed to the conventional method of dynamic specification testing of data converters, the proposed approach does not require the tester resources running at a frequency higher than the device-under-test (DUT). The test methodology was verified in simulations as well as in hardware with specification estimation error of less than 5%.