ΔΣ modulation based on-chip ramp generator for ADC BIST

Authors:
Wang Yong-Sheng;Wang Jin-Xiang;Lai Feng-Chang;Ye Yi-Zheng
Affiliations:
Microelectronics Center, Harbin Institute of Technology, Harbin, Heilongjiang, China;Microelectronics Center, Harbin Institute of Technology, Harbin, Heilongjiang, China;Microelectronics Center, Harbin Institute of Technology, Harbin, Heilongjiang, China;Microelectronics Center, Harbin Institute of Technology, Harbin, Heilongjiang, China
Venue:
CONTROL'05 Proceedings of the 2005 WSEAS international conference on Dynamical systems and control
Year:
2005

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Abstract

Based on ΔΣ modulator, an on-chip analog ramp generator for ADC BIST (Built-in Self Test) is presented. Technique uses the over-sample and ΔΣ noise shaping to generate the on-chip precise analog ramp with the precise control of a calibrator of ramp slope. Moreover, because of over-sample and ΔΣ noise shaping, the design of analog circuits is simplified, and is tolerant to the mismatch of technology. Thus, the precision of the analog ramp generator is preserved. The analog ramp generator, which is implemented using a 0.18 µm process from HJTC, has the 76dB SNR. It has wide output swing up to 1 voltage and maximum integral nonlinearity error (INL) of 190 µ V that is equivalent to 12 bits. The area overhead is 0.328mm × 0.276mm.