A new built-in self-test approach for digital-to-analog and analog-to-digital converters
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A BIST Scheme for an SNR Test of a Sigma-Delta ADC
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
A Built-in Self- Test for ADC and DAC in a Single-Chip Speech CODEC
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Efficient and accurate testing of analog-to-digital converters using oscillation-test method
EDTC '97 Proceedings of the 1997 European conference on Design and Test
A Digital BIST for Operational Amplifiers Embedded in Mixed-Signal Circuits
VTS '99 Proceedings of the 1999 17TH IEEE VLSI Test Symposium
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Mixed Signal DFT: A Concise Overview
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
A Built-in-Self-Test Scheme for Segmented and Binary Weighted DACs
Journal of Electronic Testing: Theory and Applications
A decorrelating design-for-digital-testability scheme for Σ-Δ modulators
IEEE Transactions on Circuits and Systems Part I: Regular Papers
A digitally testable Σ-Δ modulator using the decorrelating design-for-digital-testability
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A novel test approach and circuitry suitable for built-in self-test (BIST) of digital-to-analog (D/A) and analog-to-digital (A/D) converters using static parameters are proposed. Offset, gain, integral nonlinearity (INL) and differential nonlinearity (DNL) are tested without using mixed-mode or logic test equipment. The proposed BIST structure presents a compromise between area overhead (AO), test time, and fault coverage. The BIST circuitry has been designed and evaluated using CMOS 1.2-micron technology. The simulations show that, assuming the BIST voltage references fulfill the required accuracy, the BIST structure is applicable for testing D/A and A/D converters up to 16-bits of resolution. By only a minor modification, the test structure would be able to localize the fail situation and to test all D/A converters on the same chip. The small value of AO, the simplicity and efficiency of the proposed BIST architectures seem to be promising for manufacturing.