Discrete-time signal processing
Discrete-time signal processing
A new built-in self-test approach for digital-to-analog and analog-to-digital converters
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Fault-based automatic test generator for linear analog circuits
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Discrete Random Signals and Statistical Signal Processing
Discrete Random Signals and Statistical Signal Processing
A Signature Analyzer for Analog and Mixed-signal Circuits
ICCS '94 Proceedings of the1994 IEEE International Conference on Computer Design: VLSI in Computer & Processors
Application of Joint Time-Frequency Analysis in Mixed-Signal Testing
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
A BIST Scheme for an SNR Test of a Sigma-Delta ADC
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
A Built-in Self- Test for ADC and DAC in a Single-Chip Speech CODEC
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
Mixed-Signal Circuit Classification in a Pseudo-Random Testing Scheme
Journal of Electronic Testing: Theory and Applications
Design for Testability and Built-In Self-Test of Mixed-Signal Circuits: A Tutorial
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Test Solution For OTA Based Analog Circuits
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Functional test pattern generation for CMOS operational amplifier
VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium
Testing and Characterization of the One-Bit First-Order Delta-Sigma
ITC '00 Proceedings of the 2000 IEEE International Test Conference
System-on-Chip Test Architectures: Nanometer Design for Testability
System-on-Chip Test Architectures: Nanometer Design for Testability
Wafer-level defect screening for "big-D/small-A" mixed-signal SoCs
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Implicit functional testing of switched current filter based on fault signatures
Analog Integrated Circuits and Signal Processing
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In this paper, we address the problem of functional testing of mixed-signal circuits using pseudo-random patterns. By embedding the linear, time-invariant (LTI) analog circuit between a digital-to-analog converter (DAC) and an analog-to-digital converter (ADC), we can model the analog and converter circuitry as a digital LTI system and test it using the pseudo-random vectors. We give mathematical analysis and formulate the pseudo-random testing process as the linear transformation of a random process by the analog LTI device under test (DUT). We choose the first and the second moments of the transformed random process, which are closely related to the functionality of the DUT, as the signatures for fault detection. We show that such signatures can be estimated by proper arithmetic operations on the output responses of the DUT to the vectors generated by LFSRs. We illustrate and compare the effectiveness of several possible choices of signatures, through analysis and experimental results of several circuits, in terms of their fault detection capabilities and the testing hardware requirements.