Design of ICs applying built-in current testing
Journal of Electronic Testing: Theory and Applications - Special issue on IDDQ testing of VLSI circuits
A new built-in self-test approach for digital-to-analog and analog-to-digital converters
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
A practical current sensing technique for IDDQ testing
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Circuit Design for Built-in Current Testing
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Built-In Current Sensor for IDDQ Test in CMOS
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
CMOS: Circuit Design, Layout, and Simulation (IEEE Press Series on Microelectronic Systems)
CMOS: Circuit Design, Layout, and Simulation (IEEE Press Series on Microelectronic Systems)
Optimal testing of VLSI analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Testing analog and mixed-signal integrated circuits using oscillation-test method
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Pseudorandom testing for mixed-signal circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Reducing functional unit power consumption and its variation using leakage sensors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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This paper presents a simple built-in current sensor (BICS) design for quiescent current (I"D"D"Q) testing of CMOS data converter circuits. The proposed BICS works in two modes: the normal mode and the test mode. In the normal mode, the BICS is isolated from the circuit under test (CUT) due to which there is no performance degradation of the circuit. In the testing mode, the BICS detects the abnormal current caused by permanent manufacturing defects and has negligible impact on the performance of the circuit under test. The dynamic current of the CUT does not affect the BICS output. The BICS is operated from power supply voltages of the CUT using the current reference configuration. A 10-bit charge scaling digital-to-analog converter and a first-order modulator of an 8-bit sigma delta analog-to-digital converter have been designed in standard 1.5@mm CMOS and tested using the present BICS for injected faults simulating manufacturing defects. It is shown that significant improvement in testing of mixed signal integrated circuits has been achieved using a simple fault injection technique combined with the BICS.