Practical numerical algorithms for chaotic systems
Practical numerical algorithms for chaotic systems
A new built-in self-test approach for digital-to-analog and analog-to-digital converters
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Probability (2nd ed.)
A digital method for testing embedded switched capacitor filters
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Reuse of existing resources for analog BIST of a switch capacitor filter.
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Analysis and Design of Analog Integrated Circuits
Analysis and Design of Analog Integrated Circuits
Design for testability of integrated operational amplifiers using oscillation-test strategy
ICCD '96 Proceedings of the 1996 International Conference on Computer Design, VLSI in Computers and Processors
Efficient and accurate testing of analog-to-digital converters using oscillation-test method
EDTC '97 Proceedings of the 1997 European conference on Design and Test
Built-In Self-Test in Mixed-Signal ICs: A DTMF Macrocell
VLSID '00 Proceedings of the 13th International Conference on VLSI Design
A Path Sensitization Technique for Testing of Switched Capacitor Circuits
VLSID '03 Proceedings of the 16th International Conference on VLSI Design
Oscillation-test strategy for analog and mixed-signal integrated circuits
VTS '96 Proceedings of the 14th IEEE VLSI Test Symposium
Testing of Digital Systems
Efficient Parametric Fault Detection in Switched-Capacitor Filters
IEEE Design & Test
VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)
VLSI Test Principles and Architectures: Design for Testability (Systems on Silicon)
Oscillation-Based Test in Mixed-Signal Circuits (Frontiers in Electronic Testing)
Oscillation-Based Test in Mixed-Signal Circuits (Frontiers in Electronic Testing)
Microelectronic Circuits Revised Edition
Microelectronic Circuits Revised Edition
Test scheme for switched-capacitor circuits by digital analyses
DDECS '09 Proceedings of the 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits&Systems
DFT for digital detection of analog parametric faults in SC filters
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Grouping synchronization in a pulse-coupled network of chaotic spiking oscillators
IEEE Transactions on Neural Networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Testing is a critical factor for modern large-scale mixed-mode circuits. Strategies for mitigating test cost and duration include moving significant parts of the test hardware on-chip. This paper presents a novel low-overhead approach for design for test and built-in self-test of analog and mixed-mode blocks, derived from the oscillation-based test framework. The latter is enhanced by the use of complex oscillation regimes, improving fault coverage and enabling forms of parametric or specification-based testing. This technique, initially proposed targeting large subsystems such as A/D converters, is here illustrated at a much finer granularity, considering its application to analog-filter stages, and also proving its suitability to backfit existing designs. The simple case of a switched-capacitor second-order bandpass stage is used for illustration discussing how deviations from nominal gain, central frequency, and quality factor can be detected from measurements not requiring A/D stages. A sample design is validated by simulations run at the layout level, including Monte Carlo analysis and simulations based on random fault injections.