Cache performance of operating system and multiprogramming workloads
ACM Transactions on Computer Systems (TOCS)
Multiprocessor cache analysis using ATUM
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
An evaluation of directory schemes for cache coherence
ISCA '88 Proceedings of the 15th Annual International Symposium on Computer architecture
A Case for Direct-Mapped Caches
Computer
IEEE Transactions on Computers
Characteristics of performance-optimal multi-level cache hierarchies
ISCA '89 Proceedings of the 16th annual international symposium on Computer architecture
The effects of processor architecture on instruction memory traffic
ACM Transactions on Computer Systems (TOCS)
Efficient trace-driven simulation methods for cache performance analysis
ACM Transactions on Computer Systems (TOCS)
Cache write policies and performance
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
Efficient simulation of caches under optimal replacement with applications to miss characterization
SIGMETRICS '93 Proceedings of the 1993 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Trace-driven memory simulation: a survey
ACM Computing Surveys (CSUR)
Modeling set associative caches behavior for irregular computations
SIGMETRICS '98/PERFORMANCE '98 Proceedings of the 1998 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
An evaluation of directory schemes for cache coherence
25 years of the international symposia on Computer architecture (selected papers)
The performance impact of block sizes and fetch strategies
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
A Quantitative Evaluation of Cache Types for High-Performance Computer Systems
IEEE Transactions on Computers
Probabilistic Miss Equations: Evaluating Memory Hierarchy Performance
IEEE Transactions on Computers
Trace-Driven Memory Simulation: A Survey
Performance Evaluation: Origins and Directions
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