A comparing study of technology mapping for FPGA

Authors:
H.-G. Martin;W. Rosenstiel
Affiliations:
University of Tübingen - Department of Computer Engineering, Sand 13, D-72076 Tübingen, Germany;University of Tübingen - Department of Computer Engineering, Sand 13, D-72076 Tübingen, Germany
Venue:
Proceedings of the conference on Design, automation and test in Europe
Year:
1998

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Abstract

This paper investigates some design flows to obtain final designs on Xilinx XC4000 FPGAs. The examples generated by high level synthesis were mapped including placement and routing. This reveals that the common criteria of area optimal or delay-optimal circuits should be enlarged by routability and computing time.