On synthesis-for-testability of combinational logic circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
A Tutorial on Built-in Self-Test. I. Principles
IEEE Design & Test
Cost-effective generation of minimal test sets for stuck-at faults in combinational logic circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Certain applications allow flexibility in the specification of a function f by allowing any function in a subset F to be substituted for f. We call such functions flexible functions. Among the acceptable functions in F, the goal of synthesis is to find the function whose implementation minimizes a cost criterion such as area. We propose a method to select the implemented function based on a specific architecture that uses logic blocks called comparison units. We also demonstrate the advantages of using comparison unit based implementations as an intermediate synthesis step for conventional, non-flexible functions.