Short circuit power estimation of static CMOS circuits

Authors:
Seung-Ho Jung;Jong-Humn Baek;Seok-Yoon Kim
Affiliations:
Department of Computing, Soongsil University, Sangdo-dong, Dongjak-Ku, Seoul, Korea;Department of Computing, Soongsil University, Sangdo-dong, Dongjak-Ku, Seoul, Korea;Department of Computing, Soongsil University, Sangdo-dong, Dongjak-Ku, Seoul, Korea
Venue:
Proceedings of the 2001 Asia and South Pacific Design Automation Conference
Year:
2001

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Abstract

This paper presents a simple method to estimate short-circuit power dissipation for static CMOS logic circuits. Short-circuit current expression is derived by accurately interpolating peak points of actual current curves which is influenced by the gate-to-drain coupling capacitance. It is shown through simulations that the proposed technique yields better accuracy than previous methods when signal transition time and/or load capacitance decreases, which is a characteristic of the present technological evolution.