A physical design tool for built-in self-repairable RAMs

  • Authors:
  • Kanad Chakraborty;Shriram Kulkarni;Mayukh Bhattacharya;Pinaki Mazumder;Anurag Gupta

  • Affiliations:
  • IBM T.J. Watson Research, Yorktown Heights, NY;Univ. of Michigan, Ann Arbor;Univ. of Michigan, Ann Arbor;Univ. of Michigan, Ann Arbor;Intel Corp., Santa Clara, CA

  • Venue:
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
  • Year:
  • 2001

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Abstract

In this paper, we present the description and evaluation of a novel physical design tool, BISRAMGEN, that can generate reconfigurable and fault-tolerant RAM modules. This tool designs a redundant RAM array with accompanying built-in self-test (BIST) and built-in self-repair (BISR) logic that can switch out faulty rows and switch in spare rows. Built-in self-repair causes significant improvement in reliability, production yield, and manufacturing cost of ASICs and microprocessors with embedded RAMs.