Power analysis of embedded software: a first step towards software power minimization
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Reducing power in high-performance microprocessors
DAC '98 Proceedings of the 35th annual Design Automation Conference
Implementing elliptic curve cryptography
Implementing elliptic curve cryptography
Utilizing memory bandwidth in DSP embedded processors
Proceedings of the 38th annual Design Automation Conference
Security-driven exploration of cryptography in DSP cores
Proceedings of the 15th international symposium on System Synthesis
Secure Elliptic Curve Implementations: An Analysis of Resistance to Power-Attacks in a DSP Processor
CHES '02 Revised Papers from the 4th International Workshop on Cryptographic Hardware and Embedded Systems
A network flow approach to memory bandwidth utilization in embedded DSP core processors
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Design of secure cryptography against the threat of power-attacks in DSP-embedded processors
ACM Transactions on Embedded Computing Systems (TECS)
Iterative schedule optimization for voltage scalable distributed embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Instantaneous current modeling in a complex VLIW processor core
ACM Transactions on Embedded Computing Systems (TECS)
VLIW instruction scheduling for minimal power variation
ACM Transactions on Architecture and Code Optimization (TACO)
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This paper describes a new methodology for analyzing low-level current dynamics at the instruction level and the program level for a VLIW DSP processor core. An efficient methodology for software power analysis is presented which unlike other research supports dynamic current analysis and complex VLIW processor cores. Analysis of high bank register allocation, equivalent functional construct usage, and program-based current, power, and energy is presented. The basic principles and methods developed throughout this research are general and applicable to complex pipelined processors. This research is important for analyzing and designing secure power-efficient DSP embedded applications.