A Parallel VLSI Video/Communication Controller

Authors:
Gr. Doumenis;G. Konstantoulakis;G. Korinthios;G. Lykakis;D. Reisis;G. Synnefakis
Affiliations:
National Technical University of Athens (NTUA), Telecommunications Lab., Computer Science Division, Zographou, GR-157 73, Athens, Greece;National Technical University of Athens (NTUA), Telecommunications Lab., Computer Science Division, Zographou, GR-157 73, Athens, Greece;University of Athens (UoA), Electronics Lab., Applied Physics Division;National Technical University of Athens (NTUA), Telecommunications Lab., Computer Science Division, Zographou, GR-157 73, Athens, Greece;University of Athens (UoA), Electronics Lab., Applied Physics Division;National Technical University of Athens (NTUA), Telecommunications Lab., Computer Science Division, Zographou, GR-157 73, Athens, Greece
Venue:
Journal of VLSI Signal Processing Systems - Parallel VLSI architectures for image and video processing
Year:
2001

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Abstract

This paper presents a VLSI architecture specifically designed as a video/communication controller to support emerging applications in the area of video/data communications. The controller is a parallel architecture consisting of three (3) processing modules, a shared memory with four (4) banks and two (2) input/output modules and operating at the transfer speed of 622 Mbits/sec. The processing modules and memory banks communicate through a low cost interconnection scheme able though to perform at system's required data transfer rate. The entire system constitutes a component which can accommodate a switching system as an intelligent buffer with real time processing and multiplexing capabilities. The component performs operations on fixed and/or variable length packets of data on a stream basis. The architecture embeds both the processing and the memory modules, thus producing a “system on a chip” solution.