A Parallel VLSI Video/Communication Controller
Journal of VLSI Signal Processing Systems - Parallel VLSI architectures for image and video processing
Improving memory energy using access pattern classification
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
New implementation of multi-priority pushout for shared memory ATM switches
Computer Communications
Beyond best effort: router architectures for the differentiated services of tomorrow's Internet
IEEE Communications Magazine
Memory management for embedded network applications
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Design of a generalized priority queue manager for ATM switches
IEEE Journal on Selected Areas in Communications
A fully-programmable memory management system optimizing queue handling at multi gigabit rates
Proceedings of the 40th annual Design Automation Conference
Methods for evaluating and covering the design space during early design development
Integration, the VLSI Journal
Design of an efficient memory subsystem for network processor
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Power aware data type refinement for the HIPERLAN/2
MIV'05 Proceedings of the 5th WSEAS international conference on Multimedia, internet & video technologies
Advanced packet segmentation and buffering algorithms in network processors
Transactions on High-Performance Embedded Architectures and Compilers IV
Hi-index | 0.00 |
In high-speed network processors, data queueing has to allow real-time memory (de)allocation, buffering, retrieving, and forwarding of incoming data packets. Its implementation must be highly optimized to combine high speed, low power, large data storage, and high memory bandwidth. In this paper, such data queueing is used as case study to demonstrate the effectiveness of a new system-level exploration method for optimizing the memory performance in dynamic memory management. Assuming that a multi-bank memory architecture is used for data storage, the method trades off bank conflicts against memory accesses during real-time memory (de)allocation. It has been applied to the data queueing module of the PRO3 system [8]. Compared with the conventional memory management technique for embedded systems, our exploration method can save up to 90% of the bank conflicts, which allows to improve worst-case memory performance of data queueing operations by 50% too.