Computer - IEEE Centennial: the state of computing
Communications of the ACM - Special section on computer architecture
The Architecture of SM3: A Dynamically Partitionable Multicomputer System
IEEE Transactions on Computers
ACM Transactions on Programming Languages and Systems (TOPLAS)
Communications of the ACM - Special issue on computer architecture
Performance evaluation of the statistical aggregation by categorization in the SM3 system
SIGMOD '84 Proceedings of the 1984 ACM SIGMOD international conference on Management of data
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ACM SIGARCH Computer Architecture News
SM3: A Dynamically Partitionable Multicomputer System with Switchable Main Memory Modules
Proceedings of the First International Conference on Data Engineering
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IEEE Transactions on Software Engineering
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Proceedings of the 1990 ACM/IEEE conference on Supercomputing
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
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This paper presents an analysis and evaluation of the performance of a multicomputer system (SM3) in supporting two basic matrix operations, namely multiplication and inversion. The system supports the efficient execution of the above mentioned operations by 1) achieving a high-bandwidth data transfer among computers by switching main memory modules, 2) supporting network partitioning, 3) employing a hardware communication and synchronization scheme, 4) using a distributed control technique, and 5) providing means to dynamically transfer control. Timing equations are derived and evaluated in an attempt to analyze the performance. Different cases which arise due to the relative sizes of memory modules and matrices during matrix multiplication are analyzed. The cases of partial and maximal pivoting during inversion are also analyzed. The SM3 system is compared quantitatively and qualitatively to a hypercube architecture.