Embedded program timing analysis based on path clustering and architecture classification
ICCAD '97 Proceedings of the 1997 IEEE/ACM international conference on Computer-aided design
Simulation/evaluation environment for a VLIW processor architecture
IBM Journal of Research and Development - Special issue: performance analysis and its impact on design
Intervals in software execution cost analysis
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Path clustering in software timing analysis
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - System Level Design
Modeling assembly instruction timing in superscalar architectures
Proceedings of the 15th international symposium on System Synthesis
Sleipnir-An Instruction-Level Simulator Generator
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Embedded DSP Processor Design: Application Specific Instruction Set Processors
Embedded DSP Processor Design: Application Specific Instruction Set Processors
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From the Publisher:Fast Simulation of Computer Architectures describes fast, efficient and sophisticated techniques for quantitative computer architecture evaluation. Chapters in the book cover topics such as how to collect traces, emulate instruction sets, simulate multiprocessors using execution-driven techniques, evaluate memory hierarchies, apply statistical sampling to simulation, and how to augment simulation with performance bound models. Fast Simulation of Computer Architectures will be of tremendous interest to practicing computer architect designers seeking timely solutions to tough evaluation problems, and to advanced upper division undergraduate and graduate level students studying in this area. To that end, the Editors have included between ten to twenty problems at the end of Chapters 2 through 8 that will be useful study aids.