Evaluation of the WM architecture
ISCA '92 Proceedings of the 19th annual international symposium on Computer architecture
MISC: a Multiple Instruction Stream Computer
MICRO 25 Proceedings of the 25th annual international symposium on Microarchitecture
The El'brus-3 and MARS-M: recent advances in Russian high-performance computing
The Journal of Supercomputing
The effectiveness of decoupling
ICS '93 Proceedings of the 7th international conference on Supercomputing
Code scheduling for multiple instruction stream architectures
International Journal of Parallel Programming
Compiling and optimizing for decoupled architectures
Supercomputing '95 Proceedings of the 1995 ACM/IEEE conference on Supercomputing
A comparision of superscalar and decoupled access/execute architectures
MICRO 26 Proceedings of the 26th annual international symposium on Microarchitecture
Complexity-effective superscalar processors
Proceedings of the 24th annual international symposium on Computer architecture
A comparison of data prefetching on an access decoupled and superscalar machine
MICRO 30 Proceedings of the 30th annual ACM/IEEE international symposium on Microarchitecture
Speculative multithreaded processors
ICS '98 Proceedings of the 12th international conference on Supercomputing
PIPE: a VLSI decoupled architecture
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Clock rate versus IPC: the end of the road for conventional microarchitectures
Proceedings of the 27th annual international symposium on Computer architecture
The Alpha 21264 Microprocessor
IEEE Micro
Performance of the decoupled ACRI-1 architecture: the perfect club
HPCN Europe '95 Proceedings of the International Conference and Exhibition on High-Performance Computing and Networking
Decoupled access/execute computer architectures
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
The Synergy of Multithreading and Access/Execute Decoupling
HPCA '99 Proceedings of the 5th International Symposium on High Performance Computer Architecture
On the Design Complexity of the Issue Logic of Superscalar Machines
EUROMICRO '98 Proceedings of the 24th Conference on EUROMICRO - Volume 1
Automatic Thread Extraction with Decoupled Software Pipelining
Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture
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Decoupled architectures have not traditionally been used in the context of general purpose computing because of their inability to tolerate control-intensive code that exists across a wide range of applications. This work investigates the possibility of using multithreading to overcome the loss of decoupling dependencies that represent the cause of this main limitation in decoupled architectures. A proposal for a multithreaded decoupled control/access/execute architecture is presented as a platform for achieving high performance on general purpose workloads. It is argued that such a decoupled architecture is more complexity-effective and scalable than comparable superscalar processors, which incorporate enormous amounts of complexity for modest performance gains.