MiniMIPS: a simulation project for the computer architecture laboratory

  • Authors:
  • Ewa Z. Bem;Luke Petelczyc

  • Affiliations:
  • University of Western Sydney;University of Western Sydney

  • Venue:
  • SIGCSE '03 Proceedings of the 34th SIGCSE technical symposium on Computer science education
  • Year:
  • 2003

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Abstract

We developed the project presented in this paper for an undergraduate computer architecture course specifically aimed at non-engineering students. The project is designed to develop understanding of processor organisation at the functional unit level by building a series software execution driven simulators, from a single cycle sequential processor to a simple pipelined processor. The students are lead through the functional design process step by step, in a succession of carefully structured tasks. The project starts by building functional units of a processor. These units are then used to construct a single cycle processor, a multi cycle processor, and finally a pipelined processor with data hazard detection and forwarding. The main goal of the project is to give students a true insight into the fundamental ideas, which are the basis of the development of the modern microprocessor.