A data cache with multiple caching strategies tuned to different types of locality
ICS '95 Proceedings of the 9th international conference on Supercomputing
A modified approach to data cache management
Proceedings of the 28th annual international symposium on Microarchitecture
Run-time adaptive cache hierarchy management via reference analysis
Proceedings of the 24th annual international symposium on Computer architecture
Utilizing reuse information in data cache management
ICS '98 Proceedings of the 12th international conference on Supercomputing
A locality sensitive multi-module cache with explicit management
ICS '99 Proceedings of the 13th international conference on Supercomputing
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
ACM Computing Surveys (CSUR)
Run-time adaptive cache management
Run-time adaptive cache management
Improving cache performance via active management
Improving cache performance via active management
Journal of Systems Architecture: the EUROMICRO Journal
WCAE '06 Proceedings of the 2006 workshop on Computer architecture education: held in conjunction with the 33rd International Symposium on Computer Architecture
Three-dimensional Integrated Circuit Design
Three-dimensional Integrated Circuit Design
EUROMICRO-PDP'02 Proceedings of the 10th Euromicro conference on Parallel, distributed and network-based processing
An early memory hierarchy evaluation simulator for multimedia applications
Microprocessors & Microsystems
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Recent research on cache memories has mainly focused on new approaches that split the first-level data cache into two independent subcaches. Both subcaches are accessed in parallel and each is used to place data exhibiting some particular characteristic. This article surveys a subset of recently published schemes. We introduce a methodology aimed at helping cache designers devise splitting schemes. Using this methodology, we analyze different schemes, concentrating on the goals of each.