Logic Simulation Engines in Japan

Authors:
Shigeru Takasaki;Fumiyaki Hirose;Akihiko Yamada
Affiliations:
-;-;-
Venue:
IEEE Design & Test
Year:
1989

Citing 4
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Abstract

A description is given of HAL II and SP, ultra-high-speed logic simulation engines for use in verifying large computer logic designs. Both use parallel processor architecture with a maximum configuration of 64 processors. The resulting simulation speed is a thousand times faster than that of conventional software logic simulators run on a mainframe. HAL II and SP, which can simulate a system with several million gates, have been used successfully in the design of large digital systems for logic simulation.