TMEAS, a testability measurement program
DAC '79 Proceedings of the 16th Design Automation Conference
Algorithms for fast, memory efficient switch-level fault simulation
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Distributed Test Pattern Generation for Stuck-At Faults in Sequential Circuits
Journal of Electronic Testing: Theory and Applications
Test vector decomposition-based static compaction algorithms for combinational circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Diagnostic and Detection Fault Collapsing for Multiple Output Circuits
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
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The authors present a technique, called test counting, for analyzing the testing requirements imposed on a combinational network in the form of a set of stuck-at faults to be detected. By solving a large set of mathematical inequalities, called constraints, test counting determines that certain pairs of faults cannot be test simultaneously. The result is a set of mutually independence faults, no two of which can be detected by the same test vector. The number of faults becomes a lower bound on the size of the test set required. The authors provide a list of constraints to implement the test-counting algorithm and offer a complete minimal test set for the 74LS181 ALU.