A parallel branch and bound algorithm for test generation
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
Parallel test generation for sequential circuits on general-purpose multiprocessors
DAC '91 Proceedings of the 28th ACM/IEEE Design Automation Conference
Cost-effective generation of minimal test sets for stuck-at faults in combinational logic circuits
DAC '93 Proceedings of the 30th international Design Automation Conference
Sequential circuit test generation on a distributed system
DAC '93 Proceedings of the 30th international Design Automation Conference
Monitors, messages, and clusters: the p4 parallel programming system
Parallel Computing - Special issue: message passing interfaces
Parallel algorithms for VLSI computer-aided design
Parallel algorithms for VLSI computer-aided design
Iterative [simulation-based genetics + deterministic techniques]= complete ATPG0
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Sequential circuit test generation in a genetic algorithm framework
DAC '94 Proceedings of the 31st annual Design Automation Conference
ProperHITEC: a portable, parallel, object-oriented approach to sequential test generation
DAC '94 Proceedings of the 31st annual Design Automation Conference
An adaptive distributed algorithm for sequential circuit test generation
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Boolean algebraic test generation using a distributed system
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
An effective test generation system for sequential circuits
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
Test Counting: A Tool for VLSI Testing
IEEE Design & Test
An Efficient Algorithm for Sequential Circuit Test Generation
IEEE Transactions on Computers
On the Efficiency of Parallel Backtracking
IEEE Transactions on Parallel and Distributed Systems
Optimal Granularity and Scheme of Parallel Test Generation in a Distributed System
IEEE Transactions on Parallel and Distributed Systems
ProperCAd: A Portable Object-Oriented Parallel Environment for VLSI CAD
ICCD '92 Proceedings of the 1991 IEEE International Conference on Computer Design on VLSI in Computer & Processors
Workstation Based Parallel Test Generation
Proceedings of the IEEE International Test Conference on Designing, Testing, and Diagnostics - Join Them
A parallel sequential test generation system DESCARTES based on real-valued logic simulation
ATS '95 Proceedings of the 4th Asian Test Symposium
An asynchronous algorithm for sequential circuit test generation on a network of workstations
VLSID '95 Proceedings of the 8th International Conference on VLSI Design
A portable ATPG tool for parallel and distributed systems
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
Improving topological ATPG with symbolic techniques
VTS '95 Proceedings of the 13th IEEE VLSI Test Symposium
HITEC: a test generation package for sequential circuits
EURO-DAC '91 Proceedings of the conference on European design automation
Hi-index | 0.00 |
The testability of a class of regular circuits calleddivergent trees is investigated under a functional fault model. Divergent trees include such practical circuits as decoders anddemultiplexers. We prove that uncontrolled divergent trees aretestable ...