Estimating Circuit Activity in Combinational CMOS Digital Circuits

  • Authors:
  • Hendrawan Soeleman;Kaushik Roy;Tan-Li Chou

  • Affiliations:
  • -;-;-

  • Venue:
  • IEEE Design & Test
  • Year:
  • 2000

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Abstract

Largely because of the recent trend toward portable computing and wireless communication systems, estimating power consumption has become a major concern in today's VLSI circuit and system design. Moreover, the dramatic decrease in feature size, combined with the corresponding increase in the number of devices on a chip, makes the power density larger. To be practical, a portable system should be able to operate for an extended period without requiring a batter recharge or replacement. Achieving this objective means minimizing power consumption. Fast and accurate probabilistic and statistical techniques for estimating circuit activity in CMOS digital circuits offer an alternative to circuit simulation. The techniques use statistics of input signals to determine accurate switching information