Testing semiconductor memories: theory and practice
Testing semiconductor memories: theory and practice
Fundamentals of MCM Testing and Design-for-Testability
Journal of Electronic Testing: Theory and Applications - Special issue on multi-chip testing and design for testability
Designing “Dual Personality” IEEE 1149.1 Compliant Multi-Chip Modules
Journal of Electronic Testing: Theory and Applications - Special issue on multi-chip testing and design for testability
Circular Self-Test Path for FSMs
IEEE Design & Test
Testing NASA's 3D-Stack MCM Space Flight Computer
IEEE Design & Test
Fast Arithmetic and Fault Tolerance in the FERMI System
ASAP '97 Proceedings of the IEEE International Conference on Application-Specific Systems, Architectures and Processors
Testing An MCM For High-Energy Physics Experiments: A Case Study
ITC '99 Proceedings of the 1999 IEEE International Test Conference
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Engineers at Politecnico di Torino designed a multichip module for high-energy physics experiments conducted on the Large Hadron Collider. An array of these MCMs handles multichannel data acquisition and signal processing. Testing the MCM from board to die level required a combination of DFT strategies.