Communications of the ACM
Stubborn sets for reduced state generation
APN 90 Proceedings on Advances in Petri nets 1990
Mayfly: a general-purpose, scalable, parallel processing architecture
Lisp and Symbolic Computation
TITAC: Design of A Quasi-Delay-Insensitive Microprocessor
IEEE Design & Test
Symbolic Model Checking
Signal Graphs: From Self-Timed to Timed Ones
International Workshop on Timed Petri Nets
VLSI '93 Proceedings of the IFIP TC10/WG 10.5 International Conference on Very Large Scale Integration
Petri Net Analysis Using Boolean Manipulation
Proceedings of the 15th International Conference on Application and Theory of Petri Nets
Cellular arrays for asynchronous control
MICRO 7 Conference record of the 7th annual workshop on Microprogramming
Interoperable Petri net models via ontology
International Journal of Web Engineering and Technology
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We describe a technique for the design and analysis of a simple asynchronous microprocessor from a Labeled Petri Net specification. The implementation is obtained by means of refinement, transformation and translation. Several versions of the microprocessor design are presented, evaluated and compared. The Petri net based approach allows an interplay of different formal tasks, such as synthesis, verification and performance evaluation, to be carried out within the single modeling framework.