Bulldog: a compiler for VLSI architectures
Bulldog: a compiler for VLSI architectures
The superblock: an effective technique for VLIW and superscalar compilation
The Journal of Supercomputing - Special issue on instruction-level parallelism
A comparison of full and partial predicated execution support for ILP processors
ISCA '95 Proceedings of the 22nd annual international symposium on Computer architecture
A VLIW low power Java processor for embedded applications
SBCCI '04 Proceedings of the 17th symposium on Integrated circuits and system design
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Automatic instruction scheduler retargeting by reverse-engineering
Proceedings of the 2006 ACM SIGPLAN conference on Programming language design and implementation
Reducing code size in VLIW instruction scheduling
Journal of Embedded Computing - Low-power Embedded Systems
A Multi-Shared Register File Structure for VLIW Processors
Journal of Signal Processing Systems
Performance evaluation of compiler controlled power saving scheme
ISHPC'05/ALPS'06 Proceedings of the 6th international symposium on high-performance computing and 1st international conference on Advanced low power systems
Reducing instruction bit-width for low-power VLIW architectures
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Towards a multiple-ISA embedded system
Journal of Systems Architecture: the EUROMICRO Journal
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Developed for digital consumer products, the FR500 microprocessor issues four instructions simultaneously and can be configured in a small-scale circuit, making it possible to implement a low-cost, high-performance system.