On the effective bandwidth of interleaved memories in vector processor systems
IEEE Transactions on Computers
A Simulation Study of the CRAY X-MP Memory System
IEEE Transactions on Computers
Vector access performance in parallel memories using skewed storage scheme
IEEE Transactions on Computers
Memory conflicts and machine performance
Proceedings of the 1989 ACM/IEEE conference on Supercomputing
On randomly interleaved memories
Proceedings of the 1990 ACM/IEEE conference on Supercomputing
Memory architectures for vector processing
Memory architectures for vector processing
Semi-linear and bi-base storage schemes classes: general overview and case study
ICS '95 Proceedings of the 9th international conference on Supercomputing
Minimizing Conflicts Between Vector Streams in Interleaved Memory Systems
IEEE Transactions on Computers
Co-design of interleaved memory systems
CODES '00 Proceedings of the eighth international workshop on Hardware/software codesign
Increasing the effective bandwidth of complex memory systems in multivector processors
Supercomputing '96 Proceedings of the 1996 ACM/IEEE conference on Supercomputing
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Compiler-Based Performance Evaluation of an SIMD Processor with a Multi-Bank Memory Unit
Journal of Signal Processing Systems
| Hi-index | 14.98 |
Memory interference occurs when two or more concurrent data requests are addressed to the same main memory bank. In vector superconductors, this problem is serious due to the periodic interaction among vectors accesses, and can significantly reduce memory bandwidth and overall system performance. Two techniques can be used to reduce the effects of memory interference. First, vector data can be placed in the main memory such that, when accessed concurrently, the vectors do not interfere with one another. Second, buffers can be used at the memory banks to hold conflicting requests and to allow vector streams to continue to access other banks. Conditions for arbitrary numbers of vector streams to access an interleaved memory system without conflict are derived. It is shown that when three or more vector streams must be accessed concurrently, vector data placement to avoid conflicts becomes increasingly difficult, and that bank buffers can be effective under these conditions in increasing the effective memory bandwidth.