IEEE Transactions on Information Theory
Design of Fast Self-Testing Checkers for a Class of Berger Codes
IEEE Transactions on Computers
Single- and Double-Output Embedded Checker Architectures for Systematic Unordered Codes"
Journal of Electronic Testing: Theory and Applications
Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines
IEEE Transactions on Computers
Hi-index | 14.98 |
Bose has developed a parallel unordered coding scheme using only r checkbits for 2/sup r/ information bits. This code can detect all unidirectional errors and requires simple parallel encoding/decoding. The information symbols can be separated from the check symbols. However, the information symbols containing all zeros and all ones need to be transformed to two other information symbols. This allows one to reduce the number of checkbits over Berger code by 1. Since information symbols containing a power-of-two number of bits are quite common, this coding scheme should become quite popular. The authors describe a modular, economical, and easily testable totally self-checking (TSC) checker design for the above code. The TSC concept is well known for providing concurrent error detection of transient as well as permanent faults. The design is self-testing with at most only 2r+16 codeword tests. This means that if k is the number of information bits, the size of the codeword test set is only O(log/sub 2/ k). This is the first known TSC checker design for this code.