A New Framework for Designing and Analyzing BIST Techniques and Zero Aliasing Compression
IEEE Transactions on Computers
Analysis and Design of Linear Finite State Machines for Signature Analysis Testing
IEEE Transactions on Computers
Shift Register Sequences
BIST Techniques for ASIC Design
Proceedings of the IEEE International Test Conference on Discover the New World of Test and Design
Bist signature analysis: analytical techniques for computing the probability of aliasing
Bist signature analysis: analytical techniques for computing the probability of aliasing
IEEE Transactions on Computers
| Hi-index | 14.98 |
This paper presents a new analytical method for estimating compaction quality, based on the entropy. Maximization of the entropy of the signature results in an increase of compaction quality. The paper studies the influence of the architecture of a compactor on the entropy growth. This approach is suitable for nonlinear compactors, widely known linear feedback shift registers (LFSRs) and the counting compactors, as well. Useful theorems to determine entropy growth during the test have been given and proven. Furthermore, the class of nonlinear compactors based on shift registers named cyclic feedback shift registers (CFSRs), which guarantee the maximal entropy growth and the aliasing probability of 2驴n, is found. It is shown that they are considerably better than the simplest linear compactor (feedback shift register) and in many cases are quite as good as linear compactors (LFSRs) having primitive polynomials. On the opposite side, compactors based on counters are far worse than CFSRs. The family of CFSRs is much greater than the already explored family of LFSRs and some CFSRs require less overhead.