ACM Transactions on Programming Languages and Systems (TOPLAS)
Rollback sometimes works...if filtered
WSC '89 Proceedings of the 21st conference on Winter simulation
Parallel discrete event simulation
Communications of the ACM - Special issue on simulation
Time warp on a shared memory multiprocessor
Transactions of the Society for Computer Simulation International
Parallel logic simulation of VLSI systems
ACM Computing Surveys (CSUR)
Effects of the checkpoint interval on time and space in time warp
ACM Transactions on Modeling and Computer Simulation (TOMACS)
GTW: a time warp system for shared memory multiprocessors
WSC '94 Proceedings of the 26th conference on Winter simulation
Comparative analysis of periodic state saving techniques in time warp simulators
PADS '95 Proceedings of the ninth workshop on Parallel and distributed simulation
Clustered time warp and logic simulation
PADS '95 Proceedings of the ninth workshop on Parallel and distributed simulation
The dynamic load balancing of clustered time warp for logic simulation
PADS '96 Proceedings of the tenth workshop on Parallel and distributed simulation
Adaptive flow control in time warp
Proceedings of the eleventh workshop on Parallel and distributed simulation
On learning algorithms and balancing loads in Time Warp
PADS '99 Proceedings of the thirteenth workshop on Parallel and distributed simulation
Parallel mixed-level simulation of digital circuits using virtual time
Parallel mixed-level simulation of digital circuits using virtual time
Clustered time warp and logic simulation
Clustered time warp and logic simulation
Parallel simulation on the hypercube multiprocessor
Distributed Computing
Predicting the Performance of Synchronous Discrete Event Simulation
IEEE Transactions on Parallel and Distributed Systems
XTW, a parallel and distributed logic simulator
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
A society of simulation approach to dynamic integration of simulations
Proceedings of the 38th conference on Winter simulation
On the scalability and dynamic load-balancing of optimistic gate level simulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
On the scalability and dynamic load balancing of parallel Verilog simulations
Winter Simulation Conference
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In this paper, we present a family of three algorithms which serve to perform checkpoints and to roll back Time Warp. These algorithms are primarily intended for use in simulations in which there are a large number of LPs and in which events have a small computational granularity. Important representatives of this class are VLSI and computer network simulations. In each of our algorithms, LPs are gathered into clusters via algorithms which are application dependent. In order to examine the performance of our algorithms and to compare them to Time Warp, we made use of two of the largest digital logic circuits available from the ISCAS89 benchmark series of combinational circuits. The execution time, number of states saved, and maximal memory consumption were compared to the same quantities for Time Warp. Our results indicated that each of the algorithms occupies a different point in the spectrum of possible trade-offs between memory usage and execution time, ranging from substantial memory savings (at a comparable cost in speed) to memory savings and a comparable speed to Time Warp. Hence, an important benefit of our algorithms is the ability to trade off memory requirements with execution time.