Advanced computer architecture
Advanced computer architecture
Parallel 2-D Convolution on a Mesh Connected Array Processor
IEEE Transactions on Pattern Analysis and Machine Intelligence
A modular systolic architecture for image convolutions
ISCA '87 Proceedings of the 14th annual international symposium on Computer architecture
A multiprocessor architecture for two-dimensional digital filters
IEEE Transactions on Computers
Parallel Algorithms for Image Template Matching on Hypercube SIMD Computers
IEEE Transactions on Pattern Analysis and Machine Intelligence
Computer Design
Digital Picture Processing
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Existing architectures for 2-D convolution suffer from such drawbacks as inflexibility with respect to image and/or kernel sizes (systolic arrays) or data distribution and collection overhead (SIMD processor arrays). This paper introduces a pipelined architecture that maps different sizes and shapes of kernels on a fixed size array of computing elements using a single pass of the input data. It is shown that the array can be operated at its highest throughout for any kernel size. Interfacing this architecture with the host requires receiving and outputting data in a simple raster-scan fashion.