ACM Transactions on Programming Languages and Systems (TOPLAS)
Architecture and design of AlphaServer GS320
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Linking Simulation with Formal Verification at a Higher Level
IEEE Design & Test
Combining Theorem Proving with Model Checking through Predicate Abstraction
IEEE Design & Test
MCjammer: adaptive verification for multi-core designs
Proceedings of the conference on Design, automation and test in Europe
Getting Formal Verification into Design Flow
FM '08 Proceedings of the 15th international symposium on Formal Methods
Verification of chip multiprocessor memory systems using a relaxed scoreboard
Proceedings of the 41st annual IEEE/ACM International Symposium on Microarchitecture
Complete formal specification of the OpenMP memory model
International Journal of Parallel Programming
Formal specification of the OpenMP memory model
IWOMP'05/IWOMP'06 Proceedings of the 2005 and 2006 international conference on OpenMP shared memory parallel programming
Understanding POWER multiprocessors
Proceedings of the 32nd ACM SIGPLAN conference on Programming language design and implementation
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We have a great deal of experience using the specification language TLA+ and its model checker TLC to analyze protocols designed at Digital and Compaq (both now part of HP). The tools and techniques we have developed apply equally well to software and hardware designs. In this paper, we describe our experience using TLA+ and TLC to verify cache-coherence protocols.